EP610PC25 vs EP610DC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP610PC25 sa pamamagitan ng Altera at EP610DC-25 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP610DC-25 - 16-Macrocell Classic EPLD, 25ns tPD, CDIP-24 | Rochester
EP610DC-25 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP610PC25 | EP610DC-25 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Device Family | Altera Classic EPLD | — |
| Logic Type | EPLD (Erasable Programmable Logic Device) | — |
| Macrocells | 16 | 16 |
| Usable Gates | 300 | — |
| Propagation Delay (tPD) | 25 ns | — |
| Pipelined Data Rate | Up to 100 MHz | Up to 100 MHz |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Programming Voltage (VPP) | 12 V | — |
| ICC (typical) | 200 mA | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0 C to +70 C |
| Packhaging | PDIP-24 | 24-pin CDIP (Ceramic DIP, through-hole) |
| Uri ng Pagpapasok | Through-Hole | Through Hole |
| Programmability | One-Time-Programmable (OTP), UV-erasable variant exists | — |
| Bilang ng Pin | 24 | — |
| Technology | 5 V CMOS | CMOS EPROM (UV-erasable) |
| Tindminan RoHS | unknown | — |
| Lifecycle | Obsolete (last shipped ~2000s) | — |
| Family | — | Altera Classic EPLD |
| Product Type | — | EPLD (Erasable Programmable Logic Device) |
| Equivalent Gates | — | 300 |
| Maximum Propagation Delay (tPD) | — | 25 ns |
| Number of I/O Pins | — | 22 |
| Number of Dedicated Inputs | — | 4 |
| Total Pin Count | — | 24 |
| Programming Method | — | JEDEC fuse-map / UV-erase |
| Speed Grade Suffix | — | -25 (25 ns tPD) |