EP910IDC-15 vs EP910PC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910IDC-15 sa pamamagitan ng Altera at EP910PC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910IDC-15 | EP910PC-15 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Altera (now Intel PSG) | — |
| Family | Classic EPLD | Altera Classic EPLD |
| Equivalent Gates | 450 | — |
| Macrocells | 24 | 24 |
| Flip-Flops | 48 | — |
| Pin-to-Pin Delay (tPD) | 15 ns | — |
| Maximum Frequency (fCNT) | 66.6 MHz | — |
| Supply Voltage (VCC) | 5 V | 4.75 V to 5.25 V (5 V nominal) |
| Packhaging | 40-pin CDIP (Ceramic DIP, through-hole) | 24-pin PDIP (PDIP-24, 0.300 inch) |
| Terminal Count | 40 | — |
| Terminal Form | Through-Hole | — |
| Temperature Grade | Commercial (0C to +70C) | — |
| Programmable Security Bit | Yes | — |
| On-board Test Circuitry | Yes | — |
| Logic Type | UV Erasable EPROM-based | — |
| I/O Pins | 24 | — |
| Dedicated Inputs | 10 | 10 |
| Programming Technology | EPROM (UV-erasable) | — |
| Tindminan RoHS | non_compliant (ceramic DIP contains lead) | [DATA_NEEDED: RoHS status - EP910 is a legacy through-hole part, likely non-RoHS] |
| Usable Gates | — | 900 |
| Maximum Pin-to-Pin Delay (tpd) | — | 15 ns |
| Counter Frequency (fCNT) | — | 100 MHz |
| Supply Current (Icc) | — | 80 mA typical |
| Dedicated I/O Pins | — | 12 |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Uri ng Pagpapasok | — | Through-Hole |
| Process Technology | — | CMOS, UV-erasable |
| Programming Method | — | Altera Logic Programmer card |
| Level ng MSL | — | Not applicable (through-hole) |