EP910ILC-15 vs EP910DC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILC-15 sa pamamagitan ng Intel at EP910DC-15 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILC-15 | EP910DC-15 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Classic EPLD | Altera Classic EPLD |
| Series | EP910 | — |
| Logic Gates | 450 | — |
| Macrocells | 24 | 24 |
| User I/O Pins | 36 | — |
| Propagation Delay (tPD) | 15 ns | — |
| Maximum Operating Frequency | 83.33 MHz | — |
| Volte ng Pagbibigay | 5 V | — |
| Uri ng Memory | EPROM (UV-erasable) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0C to +70C (commercial) |
| Packhaging | 44-pin PLCC (J-lead) | 24-pin ceramic DIP (DC) |
| Uri ng Pagpapasok | Surface Mount (SMT) | Through-Hole |
| Propagation Class | -15 speed grade | — |
| Storage Condition | Dry cabinet, humidity-controlled | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: not explicitly stated in verified data] |
| Device Density | — | 900 usable gates |
| Logic Elements | — | [DATA_NEEDED: exact LE count] |
| Dedicated Inputs | — | 12 |
| Bidirectional I/O Pins | — | 12 |
| Flip-Flops | — | 10 |
| Product Terms per Macrocells | — | 24 |
| Maximum Propagation Delay (tPD) | — | 15 ns |
| Speed Grade | — | 15 |
| Supply Voltage (VCC) | — | 5 V (typical) |
| Technology | — | CMOS EPROM, UV-erasable |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |