EP910ILI-25 vs EP910ILC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910ILI-25 sa pamamagitan ng Altera at EP910ILC-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910ILI-25 | EP910ILC-15 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Series | EP910 (Classic EPLD) | EP910 |
| Macrocells | 24 | 24 |
| Dedicated Inputs | 12 | — |
| I/O Pins | 24 | — |
| Product Terms | 240 (maximum) | — |
| Propagation Delay (tPD) | 25 ns | 15 ns |
| Technology | CMOS, EPROM | — |
| Architecture | PAL-type with global interconnect bus | — |
| Packhaging | PLCC-44 (windowed ceramic, J-lead) | 44-pin PLCC (J-lead) |
| Operating Voltage | 5 V (4.75 V to 5.25 V) | — |
| Temperature na Operasyon | -40C to +85C (Industrial) | -40C to +85C (industrial) |
| Programming Method | UV-erasable (windowed), MAX+PLUS II programmer | — |
| Logic Test Circuitry | On-board JTAG-compatible test | — |
| Tindminan RoHS | Non-compliant (windowed ceramic package) | [DATA_NEEDED: RoHS compliance status] |
| Family | — | Classic EPLD |
| Logic Gates | — | 450 |
| User I/O Pins | — | 36 |
| Maximum Operating Frequency | — | 83.33 MHz |
| Volte ng Pagbibigay | — | 5 V |
| Uri ng Memory | — | EPROM (UV-erasable) |
| Uri ng Pagpapasok | — | Surface Mount (SMT) |
| Propagation Class | — | -15 speed grade |
| Storage Condition | — | Dry cabinet, humidity-controlled |