EP910IPC-25 vs EP910ILC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910IPC-25 sa pamamagitan ng Intel at EP910ILC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910IPC-25 | EP910ILC-25 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Classic EPLD (EP910 series) | EP910 Classic EPLD |
| Manufacturer | Altera (now Intel) | — |
| Architecture | PAL-type EPLD, CMOS, UV/OTP | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Product Terms | 240 | — |
| Propagation Delay (tPD) | 25 ns | 25 ns |
| Maximum Frequency (fMAX) | 40 MHz | — |
| Dedicated Inputs | 12 | — |
| Bidirectional I/O Lines | 24 | — |
| Total Inputs (max) | 36 | — |
| Total Outputs (max) | 24 | — |
| Supply Voltage (VCC) | 5 V | — |
| Temperature na Operasyon | 0C to +70C (commercial grade) | -40C to +85C (industrial) |
| Packhaging | 40-pin PDIP (PDIP-40) | 44-pin JLCC (windowed ceramic) |
| Uri ng Pagpapasok | Through-Hole | Surface Mount |
| Programming Method | EPROM cell (OTP / UV erasable) | — |
| Development Tool | MAX+PLUS II | Altera MAX+PLUS II (legacy) |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Volte ng Pagbibigay | — | 5 V |
| Tindminan RoHS | — | non_compliant (ceramic windowed package) |
| Katayuan ng Lifecycle | — | Obsolete - last time buy was late 1990s |