EP910JC-30 vs EP910ILC-15 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910JC-30 sa pamamagitan ng Intel at EP910ILC-15 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910JC-30 | EP910ILC-15 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Classic EPLD (MAX-style) | Classic EPLD |
| Propagation Delay (tpd) | 30 ns | — |
| Maximum Internal Frequency (Fmax) | 33.3 MHz | — |
| Macrocells | 24 | 24 |
| Inputs | 36 | — |
| Product Terms | 240 | — |
| Outputs | 10 dedicated | — |
| Supply Voltage (Vcc) | 5 V | — |
| Technology | CMOS EPROM, UV-erasable | — |
| Packhaging | 44-pin Windowed Ceramic J-Lead Chip Carrier (CQCC-44 / JLCC-44) | 44-pin PLCC (J-lead) |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Supply Current (Icc) | [DATA_NEEDED: Icc typical / maximum] | — |
| Uri ng Pagpapasok | Surface Mount (socket-mountable) | Surface Mount (SMT) |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Logic Blocks | 24 macrocells (AND/OR array architecture) | — |
| Series | — | EP910 |
| Logic Gates | — | 450 |
| User I/O Pins | — | 36 |
| Propagation Delay (tPD) | — | 15 ns |
| Maximum Operating Frequency | — | 83.33 MHz |
| Volte ng Pagbibigay | — | 5 V |
| Uri ng Memory | — | EPROM (UV-erasable) |
| Propagation Class | — | -15 speed grade |
| Storage Condition | — | Dry cabinet, humidity-controlled |