EP910LC-25 vs EP910LC-35T Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-25 sa pamamagitan ng Intel at EP910LC-35T sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LC-25 | EP910LC-35T |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Altera Classic EPLD | Classic EPLD (EP910) |
| Macrocells | 24 | 24 |
| Logic Gates | [DATA_NEEDED: logic gate count] | — |
| Propagation Delay (tPD) | 25 ns | 35 ns |
| Dedicated Inputs | 16 | — |
| Packhaging | 28-pin PLCC (LC suffix) | PLCC-44 (J-lead) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (PLCC socket or solder) |
| Technology | CMOS (EPROM-based) | — |
| Operating Voltage | [DATA_NEEDED: VCC range] | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (commercial) |
| Programmable | Yes (EPROM, UV-erasable on windowed variants) | — |
| I/O Pins | [DATA_NEEDED: I/O count] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status not in verified data] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Logic Capacity | — | 450 usable gates |
| Maximum Operating Frequency | — | 28.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| User I/O Pins | — | 36 |
| Process Technology | — | CMOS (EPROM-based) |
| Erasure Method | — | UV-erasable window (ceramic package) / OTP (plastic) |
| Programming | — | Altera programming hardware + MAX+PLUS II |
| Level ng MSL | — | MSL 3 (168 hours) |