EP910LC-25 vs EP910LI-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-25 sa pamamagitan ng Intel at EP910LI-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LC-25 | EP910LI-35 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Altera Classic EPLD | Altera Classic EPLD |
| Macrocells | 24 | 24 |
| Logic Gates | [DATA_NEEDED: logic gate count] | — |
| Propagation Delay (tPD) | 25 ns | — |
| Dedicated Inputs | 16 | — |
| Packhaging | 28-pin PLCC (LC suffix) | 44-pin PLCC (J-lead) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Technology | CMOS (EPROM-based) | — |
| Operating Voltage | [DATA_NEEDED: VCC range] | — |
| Temperature na Operasyon | 0C to +70C (commercial) | -40 °C to +85 °C (Industrial) |
| Programmable | Yes (EPROM, UV-erasable on windowed variants) | — |
| I/O Pins | [DATA_NEEDED: I/O count] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Maximum Frequency | [DATA_NEEDED: fMAX] | — |
| Device Series | — | EP910 |
| Usable Gates | — | 900 |
| Maximum User I/O Pins | — | 38 |
| Propagation Delay (t_PD) | — | 35 ns |
| Maximum Counter Frequency (f_CNT) | — | 76.9 MHz |
| Volte ng Pagbibigay | — | 5 V (4.75 V to 5.25 V) |
| Process Technology | — | CMOS EPROM |
| Programming Technology | — | EPROM (UV-erasable) |
| Erase/Program Cycles | — | ≥100 |
| Lead Pitch | — | 1.27 mm |