EP910LC-35 vs EP910ILC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-35 sa pamamagitan ng Altera at EP910ILC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LC-35 | EP910ILC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Classic (EP910) | EP910 Classic EPLD |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | — |
| Propagation Delay (tPD) | 35 ns | 25 ns |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | — |
| Technology | CMOS EPROM | CMOS EPROM (UV-erasable) |
| Packhaging | PLCC-44 (J-lead, LC suffix) | 44-pin JLCC (windowed ceramic) |
| Temperature na Operasyon | 0C to +70C (commercial) | -40C to +85C (industrial) |
| Bilang ng Pin | 44 | — |
| Programmable Flip-Flops | Yes (per macrocell) | — |
| Output Enable Control | Per macrocell | — |
| Erasure Method | UV (windowed) or OTP (plastic) | — |
| Tindminan RoHS | Not applicable (legacy product) | non_compliant (ceramic windowed package) |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Uri ng Pagpapasok | — | Surface Mount |
| Volte ng Pagbibigay | — | 5 V |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Katayuan ng Lifecycle | — | Obsolete - last time buy was late 1990s |