EP910LC-35 vs EP910LC-40 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-35 sa pamamagitan ng Altera at EP910LC-40 sa pamamagitan ng Rochester Electronics. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 ObsoletePagsanggunian na paghahambing
| Parametro | EP910LC-35 | EP910LC-40 |
|---|---|---|
| Brand | Altera | Rochester Electronics |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Family | Classic (EP910) | — |
| Macrocells | 24 | 24 |
| Usable Gates | 450 | 450 |
| Propagation Delay (tPD) | 35 ns | 40 ns |
| Maximum Toggle Frequency | 28.6 MHz | — |
| Supply Voltage (VCC) | 5 V | 5 V (single supply) |
| Technology | CMOS EPROM | CMOS EPROM |
| Packhaging | PLCC-44 (J-lead, LC suffix) | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) |
| Temperature na Operasyon | 0C to +70C (commercial) | — |
| Bilang ng Pin | 44 | — |
| Programmable Flip-Flops | Yes (per macrocell) | — |
| Output Enable Control | Per macrocell | — |
| Erasure Method | UV (windowed) or OTP (plastic) | — |
| Tindminan RoHS | Not applicable (legacy product) | Not applicable (legacy) |
| Manufacturer | — | Rochester Electronics (Altera original) |
| Device Family | — | Altera Classic EPLD - EP910 |
| Logic Array Blocks | — | 2 (12 macrocells each) |
| Maximum Toggle Frequency (fMAX) | — | 25 MHz |
| User I/O Pins | — | 36 |
| Dedicated Inputs | — | 4 |
| Operating Temperature (Commercial) | — | 0 C to +70 C |
| Programming Method | — | Altera Logic Programmer (PLAD-J), 4-wire serial |
| Lead-Free Status | — | Not applicable |