EP910LC-40 vs EP910LC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-40 sa pamamagitan ng Rochester Electronics at EP910LC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP910LC-40 | EP910LC-25 |
|---|---|---|
| Brand | Rochester Electronics | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Rochester Electronics (Altera original) | — |
| Device Family | Altera Classic EPLD - EP910 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 2 (12 macrocells each) | — |
| Propagation Delay (tPD) | 40 ns | 25 ns |
| Maximum Toggle Frequency (fMAX) | 25 MHz | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | 16 |
| Supply Voltage (VCC) | 5 V (single supply) | — |
| Technology | CMOS EPROM | CMOS (EPROM-based) |
| Packhaging | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) | 28-pin PLCC (LC suffix) |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Programming Method | Altera Logic Programmer (PLAD-J), 4-wire serial | — |
| Tindminan RoHS | Not applicable (legacy) | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | Not applicable | — |
| Family | — | Altera Classic EPLD |
| Logic Gates | — | [DATA_NEEDED: logic gate count] |
| Uri ng Pagpapasok | — | Surface Mount |
| Operating Voltage | — | [DATA_NEEDED: VCC range] |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Programmable | — | Yes (EPROM, UV-erasable on windowed variants) |
| I/O Pins | — | [DATA_NEEDED: I/O count] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Maximum Frequency | — | [DATA_NEEDED: fMAX] |