EP910LC-40 vs EP910LC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-40 sa pamamagitan ng Rochester Electronics at EP910LC-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP910LC-40 | EP910LC-35 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Rochester Electronics (Altera original) | — |
| Device Family | Altera Classic EPLD - EP910 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | EPLD (Erasable Programmable Logic Device) |
| Usable Gates | 450 | 450 |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 2 (12 macrocells each) | — |
| Propagation Delay (tPD) | 40 ns | 35 ns |
| Maximum Toggle Frequency (fMAX) | 25 MHz | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | — |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V |
| Technology | CMOS EPROM | CMOS EPROM |
| Packhaging | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) | PLCC-44 (J-lead, LC suffix) |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Programming Method | Altera Logic Programmer (PLAD-J), 4-wire serial | — |
| Tindminan RoHS | Not applicable (legacy) | Not applicable (legacy product) |
| Lead-Free Status | Not applicable | — |
| Family | — | Classic (EP910) |
| Maximum Toggle Frequency | — | 28.6 MHz |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Bilang ng Pin | — | 44 |
| Programmable Flip-Flops | — | Yes (per macrocell) |
| Output Enable Control | — | Per macrocell |
| Erasure Method | — | UV (windowed) or OTP (plastic) |