EP910LC-40 vs EP910LC44-40 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC-40 sa pamamagitan ng Rochester Electronics at EP910LC44-40 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Rochester Electronics
EP910LC-40 - 450-Gate CMOS EPLD, 40ns, PQCC-44 | Rochester / Altera
EP910LC-40 Obsolete
Pagsanggunian na paghahambing
| Parametro | EP910LC-40 | EP910LC44-40 |
|---|---|---|
| Brand | Rochester Electronics | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Manufacturer | Rochester Electronics (Altera original) | — |
| Device Family | Altera Classic EPLD - EP910 | — |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Usable Gates | 450 | — |
| Macrocells | 24 | 24 |
| Logic Array Blocks | 2 (12 macrocells each) | — |
| Propagation Delay (tPD) | 40 ns | 40 ns |
| Maximum Toggle Frequency (fMAX) | 25 MHz | — |
| User I/O Pins | 36 | — |
| Dedicated Inputs | 4 | 12 |
| Supply Voltage (VCC) | 5 V (single supply) | 5 V (nominal) |
| Technology | CMOS EPROM | CMOS, UV-erasable EPROM |
| Packhaging | PQCC-44 (Plastic Leaded Chip Carrier, J-lead) | 44-pin PLCC (Plastic Leaded Chip Carrier) |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Programming Method | Altera Logic Programmer (PLAD-J), 4-wire serial | JEDEC file via LP6/MP9 or compatible programmer |
| Tindminan RoHS | Not applicable (legacy) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free Status | Not applicable | — |
| Family | — | Altera Classic EPLD |
| Product Terms (Total) | — | 240 |
| I/O Pins | — | 24 (bidirectional) |
| Total Inputs | — | 36 |
| Global Clock Inputs | — | 2 |
| Logic Compatibility | — | TTL-compatible I/O |
| Temperature na Operasyon | — | 0C to +70C (commercial) |
| Uri ng Pagpapasok | — | Surface Mount |