EP910LC44-35 vs EP910LI44 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP910LC44-35 sa pamamagitan ng Intel at EP910LI44 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP910LC44-35 EP910LI44
Brand Intel Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Obsolete
Family Classic EPLD (OT sub-family) Classic EPLD
Architecture PAL-type AND/OR array PAL-type, CMOS, One-Time-Programmable
Macrocells 24 24
Usable Gates 450 —
Propagation Delay (tPD) 35 ns (max) —
Maximum Frequency (fMAX) 28.6 MHz —
Total Inputs 36 —
I/O Pins 24 —
Global Clocks 2 —
Supply Voltage (VCC) 5 V (single supply) 4.75 V to 5.25 V (commercial), 4.5 V to 5.5 V (industrial)
Temperature na Operasyon 0C to +70C (commercial) —
Packhaging 44-pin PLCC (J-leaded) —
Uri ng Pagpapasok Surface Mount Surface Mount (PLCC socket compatible)
Process Technology CMOS —
Programmability UV-erasable (windowed ceramic) UV-erasable (windowed) or OTP
Package Type — PLCC-44 (J-lead, surface mount)
Total Pins — 44
Dedicated Inputs — 12
Bidirectional I/O — 24
Maximum Logic Inputs — 36
Maximum Outputs — 24
Flip-Flops — 24
External Clocks — 2
Maximum Propagation Delay — [DATA_NEEDED: tpd for unmarked speed grade; speed-grade suffix encodes value: -15 = 15 ns, -20 = 20 ns, -25 = 25 ns, -30 = 30 ns, -35 = 35 ns, -40 = 40 ns, -45 = 45 ns, -50 = 50 ns]
Operating Temperature (L grade) — -40 °C to +85 °C (industrial)
Technology — CMOS
Tindminan RoHS — non-compliant (original PLCC-44 lead finish)
Programming Method — Altera Logic Programmer card / Data I/O / third-party EPROM programmers

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