EP910LI44-35 vs EP910ILC-25 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP910LI44-35 sa pamamagitan ng Altera at EP910ILC-25 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP910LI44-35 | EP910ILC-25 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Device Family | Altera Classic EPLD | — |
| Series | EP910 | — |
| Architecture | PAL-type macrocell (EPLD) | — |
| Number of Macrocells | 24 | — |
| Number of External Clocks | 2 | — |
| Maksimum na Taktiko ng Oras | 37 MHz | — |
| Propagation Delay (tPD) | 35 ns | 25 ns |
| Process Technology | CMOS | — |
| Volte ng Pagbibigay | [DATA_NEEDED: VCC range] | 5 V |
| Bilang ng Pins | 44 | — |
| Package Type | PLCC-44 (J-lead) | — |
| Uri ng Pagpapasok | Surface Mount / Through-Hole Socket | Surface Mount |
| Temperature na Operasyon | [DATA_NEEDED: temperature grade] | -40C to +85C (industrial) |
| Programmability | UV-erasable / one-time programmable | — |
| Tindminan RoHS | unknown | non_compliant (ceramic windowed package) |
| Logic Family | Classic EPLD | — |
| Family | — | EP910 Classic EPLD |
| Macrocells | — | 24 |
| User I/O Pins | — | 36 |
| Internal Frequency (fMAX) | — | [DATA_NEEDED: fMAX rating] |
| Logic Blocks | — | Sum-of-products AND/OR array |
| Technology | — | CMOS EPROM (UV-erasable) |
| Configuration Memory | — | Non-volatile EPROM (windowed ceramic) |
| Packhaging | — | 44-pin JLCC (windowed ceramic) |
| Development Tool | — | Altera MAX+PLUS II (legacy) |
| Katayuan ng Lifecycle | — | Obsolete - last time buy was late 1990s |