EPC1213LI20 vs EPC1064LC20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC1213LI20 sa pamamagitan ng Intel at EPC1064LC20 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC1213LI20 | EPC1064LC20 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Uri ng Memory | OTP Configuration PROM (non-volatile) | OTP Configuration PROM (Flash-based, one-time programmable) |
| Laki ng Memory | 212 Kbit | 65 kb (65,536 bits) |
| Uri ng Interface | Serial (Altera active-serial configuration) | — |
| Supply Voltage (VCC) | 3.3 V / 5 V | — |
| I/O Voltage Tolerance | 3.3 V or 5 V | — |
| Programmability | OTP (one-time programmable) | — |
| Packhaging | 20-PLCC (9x9 mm), J-lead | — |
| Bilang ng Pin | 20 | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0 C to 70 C (Commercial) |
| Compatible FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Configuration Mode | Active Serial (AS) | — |
| Internal Oscillator | Yes (generates DCLK to FPGA) | — |
| Cascade Support | Yes (nCASC pin for multi-device chains) | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status - legacy Altera part] | Non-compliant (Sn/Pb finish) |
| Lead-Free | [DATA_NEEDED: lead-free status] | No (Sn/Pb terminal finish) |
| Programmable Type | — | OTP (One-Time Programmable) |
| Interface | — | Serial (Passive Serial / daisy-chain compatible) |
| Access Time | — | 90 ns (approximately 10 MHz) |
| Supply Voltage (Operating) | — | 4.5 V to 5.5 V |
| Supply Voltage (Nominal) | — | 5 V |
| Packhaging / Kaso | — | 20-PLCC (LC) J-lead, 9x9 mm |
| No. of Terminals | — | 20 |
| Terminal Finish | — | Tin/Lead (Sn/Pb) |
| Package Code | — | QCCJ (PLCC-20 J-lead) |
| Package Shape | — | Square |
| Compatible Altera FPGA Families | — | ACEX 1K, APEX 20K, APEX II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX |
| Configuration Modes Supported | — | Passive Serial (PS) with FPP up to 100 MHz on newer FPGAs |