EPC16Q100 vs EPC16QC100II Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC16Q100 sa pamamagitan ng Intel at EPC16QC100II sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC16Q100 EPC16QC100II
Brand Intel Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Obsolete NRND
Uri ng Memory Flash Configuration PROM FPGA Configuration PROM (Flash-based)
Laki ng Memory 16 Mb —
Volte ng Pagbibigay 3.3 V —
Programmability In-system programmable via JTAG (IEEE 1149.1) In-System Programmable via IEEE 1149.1 (JTAG)
Configuration Interface Serial/parallel Altera FPGA configuration protocol —
I/O Voltage Tolerance 3.3 V and 5 V tolerant —
Packhaging 100-pin PQFP (20 x 14 mm) 100-pin PQFP (Plastic Quad Flat Pack)
Uri ng Pagpapasok Surface Mount —
Temperature na Operasyon -40C to +85C (industrial) -40C to +85C (Industrial)
Write Protection Hardware write protection pin —
Configuration Clock Dedicated DCLK output to FPGA —
Compression Support On-chip controller supports bitstream compression Yes (reduces on-PROM footprint vs uncompressed bitstream)
JTAG Chain Support Yes (multi-device chain capable) —
Level ng MSL [DATA_NEEDED: MSL rating] 3 (per JEDEC J-STD-020)
Tindminan RoHS Compliant (lead-free version) Compliant
Family Altera Enhanced Configuration Device (EPC4/EPC8/EPC16) —
Memory Density — 16 Mbit
Supported FPGA Families — APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone
Configuration Mode — FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous)
Cascade Support — Yes (multi-PROM cascading supported)
Core Supply Voltage — 3.3 V
I/O Tolerance — 5 V tolerant configuration pins
Package Dimensions — 20 mm x 14 mm, 0.5 mm pitch
Lead Finish — Matte Tin (lead-free)
Configuration Pins — DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE

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