EPC16QC100II vs EPC16C100T Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC16QC100II sa pamamagitan ng Altera at EPC16C100T sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC16QC100II EPC16C100T
Brand Altera Intel
Kategorya Memory ICs FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Uri ng Memory FPGA Configuration PROM (Flash-based) —
Memory Density 16 Mbit —
Supported FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K, FLEX 8000, Cyclone —
Configuration Mode FPP / PSA (Fast Passive Parallel / Passive Serial Asynchronous) —
Programmability In-System Programmable via IEEE 1149.1 (JTAG) In-system via JTAG
Cascade Support Yes (multi-PROM cascading supported) —
Core Supply Voltage 3.3 V —
I/O Tolerance 5 V tolerant configuration pins —
Packhaging 100-pin PQFP (Plastic Quad Flat Pack) 100-pin PQFP
Package Dimensions 20 mm x 14 mm, 0.5 mm pitch —
Lead Finish Matte Tin (lead-free) —
Temperature na Operasyon -40C to +85C (Industrial) -40C to +85C (industrial)
Level ng MSL 3 (per JEDEC J-STD-020) —
Tindminan RoHS Compliant —
Configuration Pins DCLK, DATA[0..n], nCONFIG, nSTATUS, CONF_DONE, OE —
Compression Support Yes (reduces on-PROM footprint vs uncompressed bitstream) Yes (Stratix / Stratix II)
Laki ng Memory — 16 Mb
Device Type — Enhanced Configuration Device
Supported FPGAs — Stratix, Cyclone, APEX, Mercury (LUT-based)
Configuration Schemes — PS, PPS, FPP, PPA, JTAG
Interface — Serial / Parallel / JTAG (IEEE 1149.1)
Core Voltage — 3.3 V
I/O Voltage — 1.8 V to 3.3 V
Lead Pitch — 0.65 mm
Uri ng Pagpapasok — Surface Mount
Multi-Device Configuration — Yes (daisy chain)
Remote Update — Yes

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