EPC2LC20NA vs EPC2LC20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LC20NA sa pamamagitan ng Altera at EPC2LC20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2LC20NA | EPC2LC20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Presyo ng Yunit (USD) | — | $7.20 |
| Manufacturer | Altera Corporation (Intel Programmable Solutions Group) | — |
| Uri ng Memory | Configuration PROM (Flash-based, ISP) | Non-volatile configuration PROM |
| Memory Density | 1.6 Mbit | — |
| Operating Voltage (VCC) | 3.3 V | — |
| Interface | Serial (passive-serial) data output to FPGA | — |
| Programmability | In-system programmable via IEEE 1532 JTAG | — |
| Packhaging | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount |
| Temperature na Operasyon | -40C to +85C (industrial grade) | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Supported FPGA Families | APEX 20K, ACEX 1K, FLEX 10K, FLEX 6000, Cyclone, Mercury | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| JTAG Compliance | IEEE Std 1149.1 / IEEE 1532 | — |
| Configuration Mode | Passive Serial (PS) | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Non-Compliant (original Altera Pb-containing part) |
| Daisy-Chain Support | Yes | — |
| Recommended Companion FPGA | Altera Cyclone, FLEX 10K, APEX 20K series | — |
| Laki ng Memory | — | 1.6 Mbit |
| Configuration Interface | — | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |