EPC2LI20J vs EPC2LI20N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPC2LI20J sa pamamagitan ng Altera at EPC2LI20N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPC2LI20J | EPC2LI20N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Uri ng Memory | In-System Programmable Configuration PROM (flash) | Non-volatile configuration PROM (Flash) |
| Laki ng Memory | 1,695,680 bits (1.6Mb) | 1.6 Mbit |
| Organisasyon | 65,536 x 1-bit (serial interface) | — |
| Interface | Altera 4-pin serial configuration (DATA, DCLK, nCS, nCONFIG) | — |
| Target FPGAs | APEX II, APEX 20K/20KC/20KE, Mercury, ACEX 1K, FLEX 6000/10KE/10KA | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V (3.3 V typical) | 3.0 V to 3.6 V |
| I/O Voltage (VCCIO) | 5.0 V or 3.3 V tolerant | — |
| ISP Programming Interface | JTAG (IEEE 1149.1) | — |
| Cascade Support | Yes (multi-device configuration chain) | — |
| Internal Oscillator | Yes (configures without external clock source) | — |
| Packhaging | 20-pin PLCC with J-leads (JEDEC MS-018) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Programming Cycles | [DATA_NEEDED: minimum endurance cycles] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Configuration Clock (DCLK) | Up to 33 MHz | — |
| Programmable Type | — | In System Programmable (ISP via JTAG) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Packhaging / Kaso | — | 20-PLCC (J-Lead), 9x9 mm |
| Uri ng Pagpapasok | — | Surface Mount |
| Packaging | — | Tube |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |