EPC2TC32N vs EPC2T32 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC2TC32N sa pamamagitan ng Altera at EPC2T32 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC2TC32N EPC2T32
Brand Altera Altera
Kategorya Memory ICs Memory ICs
Katayuan ng Lifecycle Obsolete NRND
Manufacturer Altera (now Intel) —
Uri ng Memory Flash Configuration PROM —
Laki ng Memory 1.6 Mbit 1.6 Mbit
Programmable Type In System Programmable (ISP) —
Interface JTAG (IEEE 1149.1) + serial/parallel —
Supply Voltage - VCCINT 3.0 V to 3.6 V or 4.75 V to 5.25 V —
Supply Voltage - VCCIO 3.0 V to 3.6 V or 4.75 V to 5.25 V —
Max Configuration Clock 8 MHz —
Packhaging 32-TQFP (7x7 mm) 32-pin TQFP (7x7 mm)
Temperature na Operasyon 0 °C to +70 °C (Commercial) -40C to +85C (industrial)
Supported FPGA Families ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX APEX II, APEX 20K, Mercury, ACEX 1K, FLEX 10K
Daisy-Chain Support Yes (multi-FPGA cascade) —
JTAG Compliance IEEE 1149.1 —
Uri ng Pagpapasok Surface Mount Surface Mount
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] Compliant
Configuration Mode Serial (AS) or Parallel (PS/AP) Serial (DCLK/DATA/nCS)
Product Type — FPGA Configuration PROM (non-volatile boot memory)
Configuration Interface — Serial
Maksimum na Taktiko ng Oras — 10 MHz
Programmability — In-System Programmable (ISP) via JTAG
JTAG Support — Yes (IEEE 1149.1 boundary-scan + ISP)
Volte ng Pagbibigay — 3.3 V (5 V tolerant I/O per datasheet)
Cascadable — No (single-device configuration only)
Level ng MSL — [DATA_NEEDED: MSL level]
Lead-Free — Yes
Document Size (third-party) — 26 pages (per alldatasheet listing)

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