EPC40C100 vs EPC448PC-20 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPC40C100 sa pamamagitan ng Altera at EPC448PC-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPC40C100 EPC448PC-20
Brand Altera Altera
Kategorya FPGA & CPLD Memory ICs
Katayuan ng Lifecycle Obsolete Obsolete
Memory Density 40 Mbit 4 Mbit (4,194,304 bits)
Device Family Enhanced Configuration Device Enhanced Configuration Device (EPC)
Target FPGAs Stratix, Cyclone, APEX, Mercury, ACEX families —
Configuration Mode FPP (Fast Passive Parallel) / PS (Passive Serial) —
Interface Voltage 2.5 V / 3.3 V —
Maximum FPP Clock Frequency 66 MHz —
Programmability In-system programmable (JTAG) —
Error Detection Built-in CRC verification —
Hanay ng Temperature na Operasyon -40 C to +85 C (industrial) —
Packhaging 100-pin EQFP (Enhanced Quad Flat Pack) 20-ball PC-BGA
Pin Pitch 0.5 mm —
Uri ng Pagpapasok Surface Mount Surface Mount
Level ng MSL 3 (168 hours) —
Tindminan RoHS Compliant [DATA_NEEDED: RoHS status]
Lead-Free Yes [DATA_NEEDED: lead-free status]
Uri ng Memory NOR Flash —
Speed Grade — -20
Supply Voltage (VCC) — 3.3 V
Configuration Clock (Max) — 20 MHz
Interface to FPGA — Dedicated Altera/Intel configuration serial (Active Serial)
Programming Interface — JTAG (IEEE 1149.1) ISP
Temperature na Operasyon — [DATA_NEEDED: operating temperature range]
Configuration Time (typical 4 Mbit) — Approx. 200 ms at 20 MHz
Supported FPGA Series — APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II
Compression — Supported (1.5x to 2x depending on bitstream)

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