EPF10K100EFC484-2 vs EPF10K100EFC484-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K100EFC484-2 sa pamamagitan ng Altera at EPF10K100EFC484-3 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K100EFC484-2 | EPF10K100EFC484-3 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Presyo ng Yunit (USD) | $185.40 | — |
| Series | FLEX-10KE | — |
| Manufacturer | Altera (Intel) | — |
| Family | FLEX-10KE | FLEX 10KE |
| Logic Elements / Cells | 49,992 | — |
| Logic Array Blocks (LABs) | 624 | 624 |
| Total RAM Bits | [DATA_NEEDED: total embedded memory bits] | — |
| Number of I/O | 338 | — |
| Supply Voltage (Core) | 2.375 V to 2.625 V | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0C to +70C (commercial) | 0C to +70C (Commercial) |
| Packhaging / Kaso | 484-BBGA | — |
| Supplier Device Package | 484-FBGA (23x23 mm) | — |
| Speed Grade | -2 | -3 (fastest commercial) |
| Process Technology | 0.22 um SRAM CMOS | — |
| Configuration Method | SRAM - serial JTAG or EPC configuration device | SRAM (volatile, requires configuration device) |
| Programmable I/O Standards | LVTTL, LVCMOS, PCI, SSTL | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 158,000 |
| Logic Elements | — | 4,992 |
| Embedded Memory (EAB RAM) | — | 49,152 bits |
| User I/O Pins | — | 338 |
| Packhaging | — | 484-ball FineLine BGA |
| Core Voltage | — | 2.5 V |
| I/O Standards Supported | — | 2.5V / 3.3V / 5.0V (PCI-compliant) |
| JTAG Support | — | IEEE Std. 1149.1-1990 BST |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |