EPF10K100EFC484-3 vs EPF10K100EFC484-1N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K100EFC484-3 sa pamamagitan ng Altera at EPF10K100EFC484-1N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K100EFC484-1N - 100K FLEX 10KE FPGA, 338 I/O, 484-BGA | Intel
EPF10K100EFC484-1N ObsoletePagsanggunian na paghahambing
| Parametro | EPF10K100EFC484-3 | EPF10K100EFC484-1N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | FLEX 10KE | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 158,000 | — |
| Logic Elements | 4,992 | — |
| Logic Array Blocks (LABs) | 624 | — |
| Embedded Memory (EAB RAM) | 49,152 bits | — |
| User I/O Pins | 338 | — |
| Speed Grade | -3 (fastest commercial) | — |
| Packhaging | 484-ball FineLine BGA | 484-BBGA (FineLine BGA) |
| Temperature na Operasyon | 0C to +70C (Commercial) | 0 °C to 70 °C (commercial) |
| Core Voltage | 2.5 V | — |
| I/O Standards Supported | 2.5V / 3.3V / 5.0V (PCI-compliant) | — |
| JTAG Support | IEEE Std. 1149.1-1990 BST | — |
| Configuration Method | SRAM (volatile, requires configuration device) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | compliant (lead-free FBGA) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Manufacturer | — | Intel (formerly Altera) |
| Series | — | FLEX 10KE |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Logic Elements / Cells | — | 4,992 |
| Equivalent Gates | — | 100,000 |
| Embedded Memory Bits | — | 49,152 bits |
| Number of LABs | — | 624 |
| Number of Logic Elements | — | 4,992 |
| User I/Os | — | 338 |
| Bilang ng Pins | — | 356 (BGA-356 per one source) / 484 (BGA-484 per other sources) |
| Uri ng Pagpapasok | — | Surface Mount |
| Logic Family | — | CMOS |
| Process Technology | — | 0.22 µm CMOS SRAM |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V (5 V-tolerant inputs via VCCIO) |
| Propagation Delay (worst case) | — | 0.6 ns |
| Configuration | — | SRAM-based, in-system reprogrammable |
| JTAG / IEEE 1149.1 | — | Yes |
| Katayuan ng Lifecycle | — | Obsolete (NRND per Intel/Altera PCN history) |