EPF10K10LC84-4N vs EPF10K10LC84-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K10LC84-4N sa pamamagitan ng Altera at EPF10K10LC84-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K10LC84-4N | EPF10K10LC84-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | FLEX 10K | — |
| Family | FLEX 10K Embedded Programmable Logic Device | FLEX 10K |
| Typical Gates | 10,000 | 10,000 |
| Logic Elements (Cells) | 576 | — |
| Logic Array Blocks (LABs) | 72 | — |
| Embedded Array Blocks (EABs) | 3 | — |
| Embedded Memory (bits) | 6,144 | — |
| Maximum User I/Os | 59 | — |
| Speed Grade | -4 | -3 |
| Maximum Internal Frequency | 125 MHz | — |
| Propagation Delay | [DATA_NEEDED: typical tPD value] | — |
| Process Technology | 0.42 µm CMOS, 5 V | — |
| Supply Voltage (VCCINT) | 5 V | — |
| Temperature na Operasyon | 0 °C to 70 °C (commercial) | 0C to 70C (Commercial) |
| Packhaging | 84-pin PLCC (J-Lead, LCC-84) | 84-LCC (J-Lead) |
| Configuration Method | SRAM (serial EPROM or JTAG) | SRAM, serial via EPC1/EPC2 EPROM |
| JTAG Support | Yes (IEEE 1149.1 BST) | Yes (IEEE 1149.1 boundary-scan) |
| Uri ng Pagpapasok | Through-Hole / Socket | Surface Mount (J-bend) |
| Lead-Free / RoHS | [DATA_NEEDED: explicit RoHS statement] | — |
| Manufacturer | Altera (now Intel Programmable Solutions Group) | — |
| Logic Elements | — | 576 |
| Maximum Gates | — | 31,000 |
| Embedded Array Blocks (EAB) | — | 3 |
| Maximum RAM Bits | — | 6,144 |
| User I/O Pins | — | 59 |
| Package Code | — | QCCJ |
| Supply Voltage VCCINT | — | 5.0 V |
| Supply Voltage VCCIO | — | 3.3 V or 5.0 V (MultiVolt) |
| Tindminan RoHS | — | [DATA_NEEDED: RoHS status] |