EPF10K130EBC356-3 vs EPF10K130EBC356-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K130EBC356-3 sa pamamagitan ng Altera at EPF10K130EBC356-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF10K130EBC356-3 | EPF10K130EBC356-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | FLEX-10KE | — |
| Series | FLEX-10KE | FLEX 10KE |
| Typical Gates | 130,000 | — |
| Logic Elements | 8,192 | — |
| Logic Array Blocks (LABs) | 832 | 832 |
| Embedded Array Blocks (EABs) | 12 | — |
| Total RAM Bits | 24,576 bits (12 EABs × 2 Kbit) | — |
| Maximum User I/Os | 274 | — |
| Core Supply Voltage | 2.375 V to 2.625 V | — |
| I/O Supply Voltage | 2.5 V / 3.3 V / 5.0 V (multiVolt I/O) | — |
| Pin-to-Pin Propagation Delay (-3 grade) | 0.6 ns | — |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0C to +70C (Commercial) |
| Packhaging | 356-LBGA (35x35 mm) | 356-LBGA (35x35 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Family | CMOS | CMOS |
| Process Technology | 0.22 µm SRAM-based CMOS | 0.22 µm SRAM |
| Configuration Method | SRAM-based, JTAG (IEEE 1149.1) in-system programmable | — |
| Speed Grade | -3 (fastest) | — |
| Tindminan RoHS | Non-compliant (SnPb ball finish on legacy BGA) | — |
| Lead-Free | No | — |
| Lifecycle | Obsolete — last-time-buy / Rochester Electronics stock only | — |
| Device Family | — | FLEX-10KE Field Programmable Gate Array |
| Typical Gate Count | — | 130,000 gates |
| Logic Elements (LEs) | — | 6,656 |
| Embedded Memory (EABs) | — | 65,536 bits (8 Kbyte) / 12 EABs |
| Maximum User I/O | — | 274 |
| Maximum Operating Frequency | — | 333 MHz |
| Propagation Delay | — | 0.6 ns |
| Core Voltage | — | 2.5 V |
| I/O Voltage | — | 3.3 V (5 V tolerant) |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel |