EPF10K130EFC484-2 vs EPF10K130EFC484-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K130EFC484-2 sa pamamagitan ng Altera at EPF10K130EFC484-1 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K130EFC484-1 - FLEX-10KE FPGA 130K Gates 484-BGA | Intel / Altera
EPF10K130EFC484-1 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPF10K130EFC484-2 | EPF10K130EFC484-1 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Presyo ng Yunit (USD) | — | $92.00 |
| Family | FLEX 10KE | FLEX-10KE |
| Logic Elements | 6,656 | 6,656 |
| Equivalent Gates | 130,000 | — |
| Embedded Memory (bits) | 65,536 | — |
| User I/O Pins (max) | 369 | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Number of Embedded Array Blocks (EABs) | [DATA_NEEDED: EAB count] | — |
| Maximum Operating Frequency | 333.33 MHz | — |
| Core Voltage | 2.5 V (±5%) | — |
| Process Technology | 0.22 µm CMOS | — |
| Package Type | 484-pin FineLine BGA (FBGA) | FineLine BGA-484 |
| Package Dimensions | 23 x 23 mm, 1.0 mm pitch | 23 x 23 mm |
| Hanay ng Temperature na Operasyon | [DATA_NEEDED: commercial or industrial grade] | — |
| Speed Grade | -2 | -1 (slower commercial bin) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | unknown | [DATA_NEEDED: RoHS status] |
| Configuration Method | Serial/Parallel via Altera programming tools | — |
| I/O Standard Support | LVTTL, LVCMOS, PCI, GTL+, SSTL (refer to datasheet) | — |
| Series | — | FLEX-10KE |
| Typical Gates | — | 130,000 |
| Logic Array Blocks (LABs) | — | 832 |
| Embedded Memory (EAB) | — | 65,536 bits (64 Kbit) |
| User I/Os | — | 369 |
| Maximum Frequency | — | 333.33 MHz |
| Propagation Delay | — | 0.6 ns |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V (MultiVolt I/O compatible with 5.0 V tolerant) |
| Logic Family | — | CMOS |
| Ball Pitch | — | 1.0 mm |
| Temperature na Operasyon | — | 0C to +70C (Commercial) |
| Configuration Interface | — | JTAG (IEEE 1149.1 / IEEE 1532) |