EPF10K200SBC356-1 vs EPF10K130EBC356-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K200SBC356-1 sa pamamagitan ng Intel at EPF10K130EBC356-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K200SBC356-1 - 200K FLEX 10K FPGA, 274 I/O, 356-BGA | Intel / Altera
EPF10K200SBC356-1 NrndPagsanggunian na paghahambing
| Parametro | EPF10K200SBC356-1 | EPF10K130EBC356-1 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | FLEX 10K (Classic embedded array) | — |
| Logic Elements / Cells | 9,984 | — |
| Number of LABs / CLBs | 1,248 | — |
| Total RAM Bits | 98,304 | — |
| Equivalent Gate Count | 200,000 (system gates ~513,000) | — |
| Number of User I/Os | 274 | — |
| Propagation Delay | 0.4 ns (-1 speed grade) | 0.6 ns |
| Core Supply Voltage | 2.375 V to 2.625 V | — |
| Temperature na Operasyon | 0 °C to 70 °C (commercial) | 0C to +70C (Commercial) |
| Packhaging | 356-LBGA (35 x 35 mm, 1.27 mm pitch) | 356-LBGA (35x35 mm) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Logic Family / Process | CMOS SRAM LUT | — |
| Configuration Method | SRAM (volatile) - requires configuration device or JTAG | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Series | — | FLEX 10KE |
| Device Family | — | FLEX-10KE Field Programmable Gate Array |
| Typical Gate Count | — | 130,000 gates |
| Logic Elements (LEs) | — | 6,656 |
| Embedded Memory (EABs) | — | 65,536 bits (8 Kbyte) / 12 EABs |
| Logic Array Blocks (LABs) | — | 832 |
| Maximum User I/O | — | 274 |
| Maximum Operating Frequency | — | 333 MHz |
| Core Voltage | — | 2.5 V |
| I/O Voltage | — | 3.3 V (5 V tolerant) |
| Logic Family | — | CMOS |
| Process Technology | — | 0.22 µm SRAM |
| Configuration Interface | — | JTAG (IEEE 1149.1), Passive Serial, Passive Parallel |