EPF10K20RC208-4N vs EPF10K20RI208-4U Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K20RC208-4N sa pamamagitan ng Intel at EPF10K20RI208-4U sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF10K20RI208-4U - FLEX 10K FPGA, 20K Gates, 208-Pin RQFP | Altera
EPF10K20RI208-4U ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPF10K20RC208-4N | EPF10K20RI208-4U |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Series | FLEX 10K | FLEX 10K |
| Family | Embedded Programmable Logic Device (EPLD) | FLEX-10K® Embedded Programmable Logic Device |
| Typical Gates | 20,000 | 20,000 |
| Logic Cells | 1,152 | — |
| Logic Array Blocks (LABs) | 144 | 144 |
| Embedded Array Blocks (EABs) | 12 | [DATA_NEEDED: EAB count] |
| Embedded Memory | 12,288 bits | — |
| User I/O Pins | 147 | — |
| Bilang ng Pins | 208 | — |
| Packhaging | 208-BFQFP (RQFP) with exposed pad, 28 x 28 mm | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Speed Grade | -4 (0.6 ns typical propagation delay) | — |
| Temperature na Operasyon | 0 °C to +70 °C (commercial) | — |
| Volte ng Pagbibigay | 4.75 V to 5.25 V (5 V nominal) | — |
| Technology | 0.42 µm CMOS, SRAM-based configuration | — |
| Configuration Interface | JTAG / ByteBlaster | — |
| Tindminan RoHS | Compliant (Pb-free, 'N' suffix) | — |
| Lead-Free | Yes | — |
| Logic Elements (LEs) | — | 1,152 |
| Embedded SRAM | — | 12,288 bits |
| Maximum User I/O | — | 147 |
| Process Technology | — | 0.42 µm CMOS SRAM |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 3.3 V or 5.0 V (MultiVolt) |
| Internal Performance (Speed Grade -4) | — | 125 MHz |
| Hanay ng Temperature na Operasyon | — | -40°C to +85°C (industrial) |
| Package Type | — | 208-pin PowerQuad-4 RQFP with exposed pad |
| Configuration Method | — | Serial (EPC1/EPC2 PROM) or JTAG |
| JTAG Support | — | IEEE 1149.1 boundary-scan compliant |
| Lead Free / RoHS | — | [DATA_NEEDED: RoHS status for U variant] |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |