EPF10K30EFC256-2X vs EPF10K30EFC256-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K30EFC256-2X sa pamamagitan ng Altera at EPF10K30EFC256-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF10K30EFC256-2X - 30K FLEX-10KE FPGA 1728 Cells 256-BGA | Intel / Altera
EPF10K30EFC256-2X ObsoleteIntel
EPF10K30EFC256-1X - FLEX 10KE FPGA, 30K Gates, 256-BGA | Intel / Altera
EPF10K30EFC256-1X ObsoletePagsanggunian na paghahambing
| Parametro | EPF10K30EFC256-2X | EPF10K30EFC256-1X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | FLEX-10KE | — |
| Family | FLEX 10KE | FLEX 10KE |
| Gates | 30,000 | — |
| Logic Elements / Cells | 1,728 | — |
| Number of LABs/CLBs | 216 | — |
| Number of Logic Elements/Cells | 1,728 | — |
| Total RAM Bits | 24,576 | — |
| Number of I/O | 176 | — |
| Voltage - Supply | 2.375 V to 2.625 V | — |
| Temperature na Operasyon | 0°C to 70°C | 0 °C to +70 °C (commercial) |
| Internal Frequency (Max) | 200 MHz | — |
| Propagation Delay | 0.6 ns | — |
| Technology | 0.22 µm CMOS | — |
| Supplier Device Package | 256-FBGA (17x17) | — |
| Packhaging / Kaso | 256-BGA | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Speed Grade | -2 | -1X (fastest commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | — |
| Logic Elements | — | 1728 |
| Typical Gates | — | 30,000 |
| Logic Array Blocks (LABs) | — | 216 |
| Embedded Memory (EAB RAM) | — | 24,576 bits (6 EABs of 4 Kbit each) |
| User I/O | — | 176 |
| Maximum Internal Frequency | — | 250 MHz |
| Propagation Delay (tpd) | — | 0.4 ns to 0.6 ns |
| Process Technology | — | 0.22 µm CMOS |
| Core Supply Voltage | — | 2.5 V |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5 V |
| Packhaging | — | 256-ball FBGA, 17 x 17 mm, 1.0 mm pitch (FineLine BGA) |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1) |
| Phase-Locked Loops | — | 4 |
| Compliance | — | RoHS (check distributor for specific lot), Pb-free option available |