EPF10K30EFC256-2XN vs EPF10K30EFC256-1X Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K30EFC256-2XN sa pamamagitan ng Altera at EPF10K30EFC256-1X sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF10K30EFC256-2XN - 30K FLEX-10KE FPGA, 256-BGA, Industrial | Altera
EPF10K30EFC256-2XN ⚠ Huling PagbiliIntel
EPF10K30EFC256-1X - FLEX 10KE FPGA, 30K Gates, 256-BGA | Intel / Altera
EPF10K30EFC256-1X ObsoletePagsanggunian na paghahambing
| Parametro | EPF10K30EFC256-2XN | EPF10K30EFC256-1X |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | FLEX 10KE | FLEX 10KE |
| Typical Gates | 30,000 | 30,000 |
| Logic Elements | 1,728 | 1728 |
| Logic Cells | 1,728 | — |
| Embedded RAM Bits | 24,576 (6 x 4,096-bit EABs) | — |
| User I/O Pins | 176 | — |
| Logic Blocks (LABs) | 216 | — |
| Process Technology | 0.22 micrometer CMOS, 4-layer metal | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V (2.375 V to 2.625 V) | 2.5 V |
| Internal Frequency (max) | 200 MHz | — |
| Speed Grade | -2 | -1X (fastest commercial) |
| I/O Standards Supported | 3.3 V, 5.0 V (MultiVolt I/O) | — |
| Temperature na Operasyon | -40 C to +85 C (Industrial, 'N' suffix) | 0 °C to +70 °C (commercial) |
| Packhaging | 256-ball FBGA, 17x17 mm | 256-ball FBGA, 17 x 17 mm, 1.0 mm pitch (FineLine BGA) |
| Configuration Interface | JTAG / serial via EPC EEPROM | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Lead-Free / RoHS | Yes (per 'N' suffix) | — |
| Level ng MSL | 3 (168 hours) | — |
| Logic Array Blocks (LABs) | — | 216 |
| Embedded Memory (EAB RAM) | — | 24,576 bits (6 EABs of 4 Kbit each) |
| User I/O | — | 176 |
| Maximum Internal Frequency | — | 250 MHz |
| Propagation Delay (tpd) | — | 0.4 ns to 0.6 ns |
| MultiVolt I/O Support | — | 2.5 V / 3.3 V / 5 V |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1) |
| Phase-Locked Loops | — | 4 |
| Compliance | — | RoHS (check distributor for specific lot), Pb-free option available |