EPF10K30EQC208-1X vs EPF10K30EQC208-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K30EQC208-1X sa pamamagitan ng Intel at EPF10K30EQC208-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF10K30EQC208-1X - 30K-Gate FLEX 10KE FPGA, 147 I/O, PQFP-208 | Intel
EPF10K30EQC208-1X ObsoletePagsanggunian na paghahambing
| Parametro | EPF10K30EQC208-1X | EPF10K30EQC208-3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Series | FLEX 10KE | — |
| Family | FLEX 10KE (Altera/Intel legacy FPGA) | FLEX 10KE |
| Logic Elements / Cells | 1,728 | 1,728 |
| Typical Gate Count | 30,000 gates | — |
| Total RAM Bits | 24,576 bits | — |
| Logic Array Blocks (LABs) | 216 | — |
| Number of I/O Pins | 147 | — |
| Core Voltage (VCCINT) | 2.375 V to 2.625 V (2.5 V nominal) | — |
| I/O Voltage (VCCIO) | 3.3 V (multi-standard I/O) | — |
| Process Technology | 0.22 um CMOS, SRAM-based | CMOS |
| Internal Frequency (typical) | 250 MHz (per distributor data; fabric-dependent) | — |
| Propagation Delay | 0.6 ns (per DigChip) | 0.6 ns |
| Temperature na Operasyon | 0 C to 70 C (commercial) | 0 C to 70 C (Commercial) |
| Packhaging | 208-pin BFQFP / PQFP (28 x 28 mm) | 208-PQFP (BFQFP) |
| Uri ng Pagpapasok | Surface Mount (gull-wing) | — |
| Programming Interface | JTAG (IEEE 1149.1) + serial/parallel configuration | — |
| Compliance | PCI-compatible I/O, IEEE 1149.1 boundary scan | — |
| Product Type | — | FPGA (Field Programmable Gate Array) |
| Total Gates | — | 30,000 |
| Embedded Memory Bits | — | 24,576 |
| Embedded Array Blocks (EABs) | — | 12 |
| User I/Os | — | 246 |
| Bilang ng Pin | — | 208 |
| Terminal Form | — | Gull Wing |
| Speed Grade | — | -3 |
| Internal Frequency | — | 80 MHz (typical), 200 MHz (max) |
| Core Supply Voltage | — | 2.5 V |
| Logic Family | — | CMOS |
| JTAG (IEEE 1149.1) | — | Supported |
| Configuration Scheme | — | Serial Passive / ISP |