EPF10K50VRC240-4N vs EPF10K50VRC240-3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF10K50VRC240-4N sa pamamagitan ng Altera at EPF10K50VRC240-3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF10K50VRC240-4N - 50K-Gate FLEX-10K FPGA, 240-RQFP | Intel / Altera
EPF10K50VRC240-4N ObsoleteIntel
EPF10K50VRC240-3 - 50K Gate Flex 10K FPGA, 189 I/O, 240-RQFP | Intel / Altera
EPF10K50VRC240-3 NrndPagsanggunian na paghahambing
| Parametro | EPF10K50VRC240-4N | EPF10K50VRC240-3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | FLEX-10K | Flex 10K (FLEX 10K, SRAM-based) |
| Series | FLEX-10K | Flex 10K |
| Product Type | FPGA - Field Programmable Gate Array | — |
| Logic Family | CMOS | — |
| Typical Gates | 50,000 | 50,000 |
| Logic Cells / Elements | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| Embedded Array Blocks (EABs) | 36 | — |
| Embedded Memory (Total RAM Bits) | 20,480 | — |
| Maximum User I/Os | 189 | — |
| Number of I/Os | 189 | — |
| Packhaging | 240-BFQFP Exposed Pad (RQFP / RQFP-EP) | 240-BFQFP (RQFP) Exposed Pad |
| Package Pin Count | 240 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Internal Frequency (typical) | 66.67 MHz | — |
| Propagation Delay | 0.6 ns | 0.6 ns |
| Speed Grade | -4 | -3 (mid-range) |
| Core Supply Voltage | 3.3 V | — |
| Temperature na Operasyon | 0 C to 70 C | 0°C to 70°C (Commercial) |
| Level ng MSL | [DATA_NEEDED: MSL Level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS Status] | [DATA_NEEDED: RoHS compliance per datasheet] |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements / Cells | — | 2,880 |
| Embedded Memory (bits) | — | 20,480 (EABs) |
| User I/Os | — | 189 |
| Bilang ng Pin | — | 240 |
| Internal Frequency | — | 66.67 MHz |
| Core Voltage | — | 3.3 V |
| Configuration Method | — | SRAM, JTAG (IEEE 1149.1), serial |