EPF6010ANTC100-2 vs EPF6010ATC100-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6010ANTC100-2 sa pamamagitan ng Intel at EPF6010ATC100-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPF6010ANTC100-2 - FLEX 6000 FPGA, 880 LEs, 71 I/O, 100-TQFP | Intel
EPF6010ANTC100-2 ⚠ Huling PagbiliAltera
EPF6010ATC100-2 - FLEX 6000 FPGA, 880 Gates, 71 I/O | Intel (Altera)
EPF6010ATC100-2 ObsoletePagsanggunian na paghahambing
| Parametro | EPF6010ANTC100-2 | EPF6010ATC100-2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | FLEX 6000 / FLEX 6000A | SRAM-based FPGA |
| Logic Elements | 880 | — |
| Programmable I/O Pins | 71 | — |
| Packhaging | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-pin TQFP (14x14 mm) |
| Speed Grade | -2 | -2 |
| Temperature na Operasyon | Commercial (0C to +70C) | 0C to 70C (commercial) |
| Configuration Method | SRAM (volatile), in-system programmable | — |
| Programming Interface | IEEE 1149.1 (JTAG) / passive serial / EPC configuration device | — |
| Supply Voltage (VCCINT) | 5.0 V (FLEX 6000A); 3.3 V (FLEX 6000) | — |
| I/O Standards Supported | TTL, CMOS, PCI (with clamping diodes) | — |
| Number of LABs | [DATA_NEEDED: LAB count] | — |
| Embedded Memory | [DATA_NEEDED: embedded RAM blocks] | — |
| Global Clock Networks | [DATA_NEEDED: global clock count] | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | 3 (168 hours) | [DATA_NEEDED: moisture sensitivity level] |
| Packaging | Tray (per Altera packing standard) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Series | — | FLEX 6000 |
| Manufacturer | — | Intel (formerly Altera) |
| Logic Elements / Gates | — | 880 gates (typical) |
| Logic Array Blocks (LABs) | — | 88 |
| User I/O Pins | — | 71 |
| Number of Logic Cells | — | 880 (per FLEX 6000 family datasheet) |
| Core Supply Voltage | — | 3.0 V to 3.6 V (typical 3.3 V) |
| I/O Supply Voltage | — | 3.3 V (5 V tolerant inputs per FLEX 6000 family) |
| Configuration Interface | — | JTAG (IEEE 1149.1) + serial configuration |
| Process Node | — | [DATA_NEEDED: CMOS process node] |
| Total RAM Bits | — | [DATA_NEEDED: embedded RAM] |