EPF6016ATI100-2N vs EPF6016ATC100-2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6016ATI100-2N sa pamamagitan ng Altera at EPF6016ATC100-2N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF6016ATI100-2N - FLEX 6000 FPGA, 16K Gates, 100-TQFP | Altera/Intel
EPF6016ATI100-2N ObsoleteAltera
EPF6016ATC100-2N - 16K Gates FLEX 6000 FPGA, 100-TQFP | Altera/Intel
EPF6016ATC100-2N ObsoletePagsanggunian na paghahambing
| Parametro | EPF6016ATI100-2N | EPF6016ATC100-2N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | FLEX 6000 | — |
| Device Logic Elements | 1,320 LEs | — |
| Typical Gate Count | 16,000 gates | — |
| Logic Array Blocks (LABs) | 132 LABs (10 LEs per LAB) | 132 |
| User I/Os | 81 | — |
| Packhaging | 100-pin TQFP | 100-pin TQFP |
| Internal Operating Frequency (max) | 166.67 MHz | — |
| Core Supply Voltage | 3.3 V | 3.3 V |
| Process Technology | 0.42 um CMOS SRAM | 0.42 µm CMOS |
| Configuration Method | SRAM, JTAG BST, serial/parallel | — |
| I/O Standard Support | 3.3 V LVTTL/LVCMOS, 5.0 V tolerant | — |
| Setup Time | 2 ns (typical) | — |
| Hold Time | 0 ns (typical) | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | 0 °C to +85 °C (Commercial) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | FLEX 6000 |
| Logic Elements / Cells | — | 1,320 |
| Total Gates | — | 16,000 |
| Number of I/O | — | 81 user I/O |
| Maximum Internal Frequency | — | 172 MHz |
| I/O Supply Voltage | — | 3.3 V or 5 V tolerant |
| Configuration Memory | — | SRAM-based (volatile) |
| Package Code | — | C (100-TQFP) |
| Speed Grade | — | -2 |
| Lead-Free / RoHS | — | Yes (N suffix) |
| JTAG / IEEE 1149.1 | — | Yes |
| LUT Inputs per Logic Element | — | 4 |