EPF6016ATI144-2 vs EPF6016TI144-2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6016ATI144-2 sa pamamagitan ng Altera at EPF6016TI144-2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF6016ATI144-2 | EPF6016TI144-2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | FLEX 6000 | FLEX 6000 |
| Typical Gates | 16,000 | 16,000 |
| Logic Elements | 1,320 | 1,320 |
| User I/O Pins | 117 | — |
| Dedicated Inputs | 4 | — |
| Maksimum na Taktiko ng Oras | 153 MHz | — |
| Technology | 0.42 µm CMOS SRAM | — |
| Volte ng Pagbibigay | 3.0 V to 3.6 V (nominal 3.3 V) | — |
| I/O Tolerance | 5.0 V tolerant | — |
| Temperature na Operasyon | -40 °C to 100 °C (Industrial) | 0C to +85C (commercial) |
| Packhaging | TQFP-144 | 144-LQFP (TQFP, 0.5 mm pitch) |
| Terminal Pitch | 0.500 mm | — |
| Speed Grade | -2 | -2 |
| Configuration | SRAM, serial EPROM interface | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant (verified per datasheet) |
| Configuration Method | OptiFLEX architecture, in-system programmable | SRAM (volatile), JTAG IEEE 1149.1 |
| Logic Array Blocks (LABs) | — | 132 |
| User I/Os | — | 117 |
| Process Technology | — | 0.42 um SRAM CMOS |
| Core Supply Voltage | — | 5 V |
| Internal Frequency | — | up to 172 MHz |
| Uri ng Pagpapasok | — | Surface Mount |
| Lead-Free | — | Yes |