EPF6024AQI208-2N vs EPF6024AQI208-1 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF6024AQI208-2N sa pamamagitan ng Altera at EPF6024AQI208-1 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPF6024AQI208-1 - 24K Gate FLEX 6000 PLD, 208-PQFP, 172 MHz | Altera
EPF6024AQI208-1 ObsoletePagsanggunian na paghahambing
| Parametro | EPF6024AQI208-2N | EPF6024AQI208-1 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | FLEX 6000 | FLEX 6000 |
| Device Type | SRAM-based FPGA (loadable PLD) | Programmable Logic Device (PLD) |
| Typical Gates | 24,000 | 24,000 |
| Logic Elements | 1,960 | 1,960 LEs (estimated from family datasheet) |
| Maximum User I/O | 171 | — |
| Dedicated Inputs | 4 | — |
| Packhaging | 208-pin PQFP (Plastic Quad Flat Pack), 0.5 mm pitch | 208-pin PQFP (FQFP, gull-wing) |
| JEDEC Package Code | S-PQFP-G208 | — |
| Terminal Form | Gull-wing | — |
| Maksimum na Taktiko ng Oras | 153 MHz | 172 MHz |
| Core Supply Voltage | 3.3 V | — |
| Process Technology | CMOS, SRAM configuration | CMOS, 0.42 um 4-metal layer |
| Configuration Method | Passive Serial (PS) / Passive Parallel Async (PPA) | SRAM (volatile), serial or JTAG |
| JTAG Support | IEEE 1149.1 boundary-scan (ISP) | IEEE 1149.1 boundary-scan |
| Operating Temperature Grade | Industrial | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V nominal) |
| I/O Voltage Standard | — | 3.3 V LVTTL / LVCMOS |
| 5 V Tolerant Inputs | — | Yes |
| Bilang ng Pins | — | 208 |
| Temperature na Operasyon | — | -40C to +85C (industrial) |