EPF6024AQI208-4 vs EPF6024AQI208-3N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPF6024AQI208-4 sa pamamagitan ng Altera at EPF6024AQI208-3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPF6024AQI208-3N EPF6024AQI208-3N - FLEX 6000 FPGA 24K Gates | Altera

EPF6024AQI208-3N - FLEX 6000 FPGA 24K Gates | Altera

EPF6024AQI208-3N Obsolete

Pagsanggunian na paghahambing

Parametro EPF6024AQI208-4 EPF6024AQI208-3N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Family FLEX 6000 FLEX 6000
Logic Elements (LEs) 1960 —
Typical Gate Count 24,000 gates —
Configurable I/O Pins 171 —
Dedicated Inputs 4 —
Packhaging 208-pin PQFP (QFP-208) 208-pin PQFP / BFQFP
Package Code (JESD-30) S-PQFP-G208 —
Terminal Pitch 0.500 mm —
Process Technology CMOS SRAM 0.42 µm CMOS
Maksimum na Taktiko ng Oras 153 MHz —
Speed Grade -4 -3 (commercial speed bin, "N" lead-free suffix)
Hanay ng Temperature na Operasyon Industrial (-40°C to +85°C) —
Configuration Modes Passive Serial, Passive Parallel, JTAG —
Volte ng Pagbibigay [DATA_NEEDED: VCCINT and VCCIO range] —
Tindminan RoHS Non-compliant (legacy PQFP package) —
Logic Elements (Cells) — 1960
Equivalent Gate Count — 24000
Maximum Operating Frequency — 142.86 MHz
User I/O Pins — 171
Number of Logic Array Blocks (LABs) — 16
Core Voltage (VCCINT) — 3.3 V
I/O Voltage (VCCIO) — 3.3 V (multiVolt 2.5/3.3/5 V tolerant)
Uri ng Pagpapasok — Surface Mount
Architecture — OptiFLEX, register-rich, LUT-based
Configuration Method — Passive Serial / Passive Parallel with EPC configuration memory
Boundary Scan — JTAG IEEE 1149.1

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita