EPF8452ALC84-3 vs EPF8636ALC84-4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF8452ALC84-3 sa pamamagitan ng Altera at EPF8636ALC84-4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF8452ALC84-3 | EPF8636ALC84-4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | FLEX 8000 | FLEX 8000 |
| Device Logic Elements | 336 | — |
| Usable Gates | 4,000 to 16,000 | — |
| Number of Registers | Up to 1,500 | — |
| User I/O Count | 68 | — |
| Volte ng Pagbibigay | 5.0 V (core), 3.3 V or 5.0 V (I/O multiVolt) | — |
| Process Technology | 0.5 µm CMOS SRAM | 0.42 µm CMOS SRAM |
| Configuration Method | SRAM, serial or parallel EPROM | Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM |
| Packhaging | 84-LCC / 84-PLCC (J-Lead) | 84-Pin PLCC (J-Lead) |
| Bilang ng Pin | 84 | — |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount / Socket |
| Temperature na Operasyon | 0°C to +70°C (commercial) | 0 °C to +70 °C (Commercial) |
| Speed Grade | -3 | -4 |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| On-chip PLL | Yes | — |
| Configuration Devices Supported | EPC1, EPC1213, EPC1064, EPC1441 | — |
| MultiVolt I/O | Yes (3.3 V and 5.0 V) | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (legacy PLCC, lead-bearing) |
| Number of Logic Cells | — | 504 |
| Number of Logic Array Blocks (LABs) | — | 63 |
| Maximum Usable Gates | — | 6,000 |
| Number of User I/O Pins | — | 68 |
| Maximum Operating Frequency | — | 125 MHz |
| Supply Voltage (Core) | — | 5.0 V |
| I/O Voltage (84-pin PLCC) | — | 5.0 V only (3.3 V I/O NOT supported on this package) |
| Operating Current (typical) | — | 10 mA |
| Configuration Memory Type | — | Volatile SRAM (requires boot device) |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |