EPF8636ALC84-4 vs EPF8282ALC84-4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPF8636ALC84-4 sa pamamagitan ng Altera at EPF8282ALC84-4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPF8636ALC84-4 | EPF8282ALC84-4N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | FLEX 8000 | FLEX 8000 |
| Number of Logic Cells | 504 | — |
| Number of Logic Array Blocks (LABs) | 63 | — |
| Maximum Usable Gates | 6,000 | — |
| Number of User I/O Pins | 68 | — |
| Maximum Operating Frequency | 125 MHz | — |
| Process Technology | 0.42 µm CMOS SRAM | 0.42 µm CMOS SRAM |
| Supply Voltage (Core) | 5.0 V | — |
| I/O Voltage (84-pin PLCC) | 5.0 V only (3.3 V I/O NOT supported on this package) | — |
| Operating Current (typical) | 10 mA | — |
| Packhaging | 84-Pin PLCC (J-Lead) | — |
| Uri ng Pagpapasok | Surface Mount / Socket | Surface Mount (J-Lead) |
| Temperature na Operasyon | 0 °C to +70 °C (Commercial) | 0 °C to +70 °C (Commercial) |
| Speed Grade | -4 | — |
| Configuration Method | Serial (EPC1/EPC1064/EPC1213/EPC1441) or parallel EPROM | Serial (EPC1/EPC1064/EPC1213/EPC1441) or Parallel EPROM or Controller |
| Configuration Memory Type | Volatile SRAM (requires boot device) | — |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Tindminan RoHS | Non-compliant (legacy PLCC, lead-bearing) | [DATA_NEEDED: RoHS compliance status] |
| Usable Gates | — | 2,500 |
| Logic Elements | — | 208 |
| Maximum User I/Os | — | 68 |
| Package Type | — | 84-LCC (J-Lead) |
| Package Code | — | QCCJ (Plastic Leaded Chip Carrier, J-Bend) |
| Supply Voltage VCC | — | 5.0 V |
| Output Supply Voltage VCCIO | — | 3.3 V or 5.0 V (selectable) |
| Maximum Toggle Frequency | — | 125 MHz |
| In-Circuit Reconfigurability | — | Yes (ICR) |
| JTAG Boundary-Scan | — | Yes (IEEE 1149.1) |
| PCI Compliance | — | PCI Local Bus Specification compliant |
| Dedicated Inputs | — | 4 (synchronous control signals) |
| Logic Family | — | CMOS |