EPM240GM100C5N vs EPM240M100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GM100C5N sa pamamagitan ng Altera at EPM240M100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM240GM100C5N | EPM240M100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | MAX II G | MAX II |
| Logic Elements | 240 (192 macrocells) | 240 |
| User I/Os | 80 | 80 |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| Packhaging | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-ball MBGA (Micro FBGA), 6 x 6 mm, 0.5 mm pitch |
| Ball Pitch | 0.5 mm | — |
| Supply Voltage - Core | 3.3 V | 1.8 V |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | — |
| Configuration Memory | Non-volatile Flash | On-chip Flash (non-volatile) |
| Temperature na Operasyon | -40 C to +125 C | -40 C to +125 C |
| Lead Free / RoHS | Yes / Compliant | — |
| Level ng MSL | 3 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Process Technology | CMOS, Flash-based | 0.18 µm CMOS |
| Macrocells | — | 192 |
| Propagation Delay (tPD) | — | 4.7 ns |
| User Flash Memory | — | 8 Kbits |
| Supply Voltage - I/O | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| Tindminan RoHS | — | Compliant (lead-free) |
| Logic Family | — | CMOS |