EPM240GM100C5N vs EPM240M100I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GM100C5N sa pamamagitan ng Altera at EPM240M100I5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM240GM100C5N | EPM240M100I5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II G | MAX II CPLD |
| Logic Elements | 240 (192 macrocells) | 240 |
| User I/Os | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| Packhaging | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-MBGA (Micro FineLine BGA) |
| Ball Pitch | 0.5 mm | — |
| Supply Voltage - Core | 3.3 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) | — |
| Programming Interface | JTAG (IEEE 1149.1) - ISP | JTAG (IEEE 1149.1) |
| Configuration Memory | Non-volatile Flash | — |
| Temperature na Operasyon | -40 C to +125 C | -40 °C to +100 °C (industrial) |
| Lead Free / RoHS | Yes / Compliant | — |
| Level ng MSL | 3 | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Process Technology | CMOS, Flash-based | 0.18 µm, 6-layer metal flash |
| Series | — | MAX II |
| Macro Cells | — | 192 |
| Maximum Internal Frequency | — | 201.1 MHz |
| Propagation Delay (tPD) | — | 4.7 ns |
| On-die Non-volatile Memory | — | 8 Kbits |
| Core Voltage | — | 2.5 V / 3.3 V |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User I/O Pins | — | [DATA_NEEDED: user IO count for MBGA package] |
| Tindminan RoHS | — | Compliant |
| Lead-Free | — | Yes |