EPM240GT100C4 vs EPM240T100A5N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100C4 sa pamamagitan ng Altera at EPM240T100A5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Altera
EPM240GT100C4 EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 - MAX II CPLD, 240 LE, 100-TQFP | Altera

EPM240GT100C4 ✓ Nakahanda

Pagsanggunian na paghahambing

Parametro EPM240GT100C4 EPM240T100A5N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo Aktibo
Family MAX II MAX II
Logic Elements (LE) 240 240
Equivalent Macrocells 192 —
Pin-to-Pin Delay (tPD) 4.7 ns —
Propagation Delay 6.1 ns (max) —
User I/O Pins (max) 80 —
On-chip Flash Memory (UFM) 8 Kbits —
Process Technology 0.18-µm, 6-layer-metal flash CMOS 0.18 µm
Packhaging 100-TQFP (TQFP-100), 16 x 16 mm, 0.5 mm pitch 100-pin TQFP (14 x 14 x 1.0 mm)
I/O Standards Supported 1.5 V, 1.8 V, 2.5 V, 3.3 V (MultiVolt) —
Programming Interface JTAG (IEEE 1149.1) / In-System Programmable (ISP) JTAG (IEEE 1149.1) / ISP
Hanay ng Temperature na Operasyon 0°C to +85°C (Commercial) —
Supply Voltage (Core) 3.3 V —
Uri ng Pagpapasok Surface Mount (Gull-Wing leads) Surface Mount
Lead-Free / RoHS Lead-Free (per FindIC entry); RoHS compliance [DATA_NEEDED: verify against manufacturer datasheet] —
Macro Cells — 192
User I/O Count — 80
Pin-to-Pin Logic Delay (tPD) — 4.7 ns
Maximum Internal Frequency — 201.1 MHz
Volte ng Pagbibigay — 2.5 V / 3.3 V
I/O Bank Count — 4 (multi-voltage)
Configuration Memory — On-chip Flash (instant-on)
Temperature na Operasyon — 0C to +85C (commercial, "A5N" suffix)
Tindminan RoHS — Compliant (Pb-free)

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