EPM240GT100C4N vs EPM240GT100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100C4N sa pamamagitan ng Intel at EPM240GT100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GT100C4N | EPM240GT100C5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Logic Elements | 240 | — |
| Macro Cells | 192 | — |
| Maximum User I/O | 80 | — |
| On-chip Flash Memory | 8 Kbits | — |
| Core Voltage | 1.8 V | — |
| I/O Voltage Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Maximum Operating Frequency | 247.5 MHz | — |
| Propagation Delay (tPD) | 6.1 ns | — |
| Speed Grade | C4 | — |
| Process Technology | 0.18 µm 6-layer metal flash | — |
| Packhaging | TQFP-100 (16 × 16 mm, 0.5 mm pitch) | 100-pin TQFP (T100) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmability | JTAG (IEEE 1149.1) ISP | — |
| Tindminan RoHS | Lead-Free / Compliant | Compliant |
| Series | — | EPM240 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Macrocells | — | 192 |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| User Flash Memory (UFM) | — | 8 Kbits |
| Core Supply Voltage (VCCINT) | — | 2.5 V or 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Temperature na Operasyon | — | 0C to +85C (Commercial) |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | Non-volatile Flash (instant-on) |
| Level ng MSL | — | 3 |