EPM240GT100C5N vs EPM240T100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100C5N sa pamamagitan ng Altera at EPM240T100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GT100C5N | EPM240T100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II | MAX II |
| Series | EPM240 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | 240 | 240 |
| Macrocells | 192 | — |
| User I/Os | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Supply Voltage (VCCINT) | 2.5 V or 3.3 V | 2.5 V / 3.3 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0 °C to +85 °C (commercial, 'C' suffix) |
| Packhaging | 100-pin TQFP (T100) | 100-pin TQFP (T100), 14x14 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Programmable Type | In-System Programmable (ISP) via JTAG | — |
| Configuration Memory | Non-volatile Flash (instant-on) | — |
| Level ng MSL | 3 | — |
| Tindminan RoHS | Compliant | Compliant (lead-free) |
| Equivalent Macrocells | — | 192 |
| On-Chip User Flash | — | 8 Kbits |
| Maximum User I/O Pins | — | 80 |
| Number of I/O Banks | — | 4 |
| Pin-to-Pin Delay (speed grade 5) | — | 4.7 ns |
| Maximum Internal Frequency | — | 201.1 MHz |
| Process Technology | — | 0.18 µm, 6-layer-metal flash |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |