EPM240GT100I5N vs EPM240GT100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240GT100I5N sa pamamagitan ng Altera at EPM240GT100C5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240GT100I5N | EPM240GT100C5N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Family | MAX II | MAX II |
| Logic Elements (LEs) | 240 | 240 |
| Equivalent Macrocells | 192 | — |
| User I/Os | 80 | 80 |
| Propagation Delay (tPD) | 4.7 ns | — |
| Internal Performance (fMAX) | 304 MHz | — |
| Embedded Non-Volatile Memory | 8 Kbits user Flash | — |
| Process Technology | 0.18 µm 6-layer-metal Flash CMOS | — |
| Supply Voltage - Core (VCCINT) | 1.71 V to 1.89 V (3.3 V tolerant for MAX II G variant) | — |
| I/O Bank Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt I/O | — |
| Programming Interface | JTAG (IEEE 1149.1) ISP | — |
| Packhaging | 100-pin TQFP (14x14 mm, 0.5 mm pitch) | 100-pin TQFP (T100) |
| Temperature na Operasyon | -40 °C to +100 °C (Industrial) | 0C to +85C (Commercial) |
| Lead-Free / RoHS | Yes (suffix N) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Series | — | EPM240 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 192 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| User Flash Memory (UFM) | — | 8 Kbits |
| Core Supply Voltage (VCCINT) | — | 2.5 V or 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| Configuration Memory | — | Non-volatile Flash (instant-on) |
| Level ng MSL | — | 3 |
| Tindminan RoHS | — | Compliant |