EPM240M100C5N vs EPM240M100I5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240M100C5N sa pamamagitan ng Intel at EPM240M100I5N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM240M100C5N | EPM240M100I5N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | MAX II | MAX II CPLD |
| Logic Elements | 240 | 240 |
| Macrocells | 192 | — |
| User I/Os | 80 | — |
| Propagation Delay (tPD) | 4.7 ns | 4.7 ns |
| User Flash Memory | 8 Kbits | — |
| Supply Voltage - Core | 1.8 V | — |
| Supply Voltage - I/O | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Temperature na Operasyon | -40 C to +125 C | -40 °C to +100 °C (industrial) |
| Packhaging | 100-ball MBGA (Micro FBGA), 6 x 6 mm, 0.5 mm pitch | 100-MBGA (Micro FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Process Technology | 0.18 µm CMOS | 0.18 µm, 6-layer metal flash |
| Configuration Memory | On-chip Flash (non-volatile) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Logic Family | CMOS | — |
| Series | — | MAX II |
| Macro Cells | — | 192 |
| Maximum Internal Frequency | — | 201.1 MHz |
| On-die Non-volatile Memory | — | 8 Kbits |
| Core Voltage | — | 2.5 V / 3.3 V |
| I/O Bank Voltages | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User I/O Pins | — | [DATA_NEEDED: user IO count for MBGA package] |
| Programming Interface | — | JTAG (IEEE 1149.1) |
| Lead-Free | — | Yes |