EPM240T100I3N vs EPM570T100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240T100I3N sa pamamagitan ng Intel at EPM570T100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EPM240T100I3N | EPM570T100C5N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | MAX II | CPLD - MAX II |
| Device Logic Elements / Macrocells | 192 macrocells | — |
| Maximum User I/O Pins | 80 | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| On-chip User Flash Memory | 8 Kbits | — |
| Internal Performance | 304 MHz | 201.1 MHz |
| Pin-to-pin Logic Delay (tPD1) | 4.6 ns | — |
| Global Clock Networks | 4 | — |
| Technology Node | 0.18 um, 6-layer-metal flash CMOS | — |
| Supply Voltage - Core | 2.5 V / 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Temperature ng Junction na Operasyon | -40C to +100C (industrial, 'I' grade) | — |
| Speed Grade | 3 | — |
| Packhaging | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch | 100-pin TQFP (T100) |
| Programming Interface | JTAG / IEEE 1149.1 ISP | JTAG (IEEE 1149.1) / ISP |
| Instant-on (non-volatile) | Yes (flash-based) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | Compliant | Compliant |
| Series | — | MAX II |
| Logic Elements (LE) | — | 570 |
| Macrocells | — | 440 |
| User I/Os | — | 76 |
| User Flash Memory | — | 8 Kbit |
| Process Technology | — | 0.18 µm 6-layer-metal Flash |
| Volte ng Pagbibigay | — | 2.5 V / 3.3 V |
| Temperature na Operasyon | — | 0 °C to +85 °C (commercial) |
| Uri ng Pagpapasok | — | Surface Mount |
| I/O Standards | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V MultiVolt |