EPM240ZM100C7N vs EPM240F100C5N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240ZM100C7N sa pamamagitan ng Altera at EPM240F100C5N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM240ZM100C7N - MAX II Z CPLD 192MC 7.5ns 100-MBGA | Altera/Intel
EPM240ZM100C7N ✓ Nakahanda
Pagsanggunian na paghahambing
| Parametro | EPM240ZM100C7N | EPM240F100C5N |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | MAX II Z | — |
| Series | MAX II | — |
| Logic Elements | 240 | — |
| Macrocells | 192 | 192 |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | 4.7 ns |
| User I/Os | 80 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Packhaging | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-ball FineLine BGA (FBGA-100) |
| Configuration Memory | On-chip non-volatile flash | Non-volatile flash (instant-on) |
| Process Technology | 0.18 µm 6-layer-metal flash | — |
| JTAG Support | IEEE 1149.1 (programming + boundary-scan) | IEEE 1149.1 boundary-scan |
| Temperature na Operasyon | 0 °C to +85 °C (commercial) | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free / RoHS | Compliant per datasheet | — |
| Device Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| User I/O Pins (maximum) | — | 80 |
| Maximum Operating Frequency | — | [DATA_NEEDED: fmax per datasheet] |
| Global Clock Networks | — | [DATA_NEEDED: count] |
| Hanay ng Temperature na Operasyon | — | 0C to +85C (commercial) |
| Supply Voltage Core (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) |
| Programming Interface | — | JTAG / ByteBlasterMV |
| Tindminan RoHS | — | Compliant |