EPM240ZM100I8N vs EPM240M100C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM240ZM100I8N sa pamamagitan ng Intel at EPM240M100C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EPM240M100C4N - 192 Macrocell MAX II CPLD, 100-MBGA | Intel / Altera
EPM240M100C4N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EPM240ZM100I8N | EPM240M100C4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | MAX II | MAX II |
| Device Family | EPM240Z (Zero-Power MAX II) | EPM240 |
| Macro Cells | 192 | 192 |
| User I/Os (Max) | 80 | — |
| Logic Elements | 240 | — |
| Propagation Delay (tPD) | 7.5 ns | — |
| Internal Performance Frequency | 118.3 MHz | — |
| Process Technology | 0.18 µm CMOS | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Packhaging | 100-ball Micro FBGA (MBGA), 6x6 mm, 0.5 mm pitch | 100-pin Micro FineLine BGA (MBGA), 6 x 6 mm, 0.5 mm pitch |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40 C to +125 C (industrial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Tindminan RoHS | Lead-Free per datasheet | Lead Free (per DigiChip spec sheet) |
| Configuration Memory | On-chip Flash (non-volatile, instant-on) | Non-volatile on-chip flash (instant-on) |
| Programming Interface | JTAG (IEEE Std. 1149.1) - ISP | — |
| User I/Os | — | 80 |
| Propagation Delay (tPD) Max | — | 4.7 ns |
| Internal Operating Frequency | — | 247.5 MHz |
| Supply Voltage - Core | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | 1.5 V, 1.8 V, 2.5 V, 3.3 V LVCMOS/LVTTL |
| User Flash Memory | — | 8 Kbit |
| Programmability | — | In-System Programmable via JTAG (IEEE 1149.1) |
| Logic Family | — | CMOS |
| Logic Array Blocks (LABs) | — | 4 (16 macrocells per LAB) |
| MultiTrack Interconnect | — | Yes |
| Hot Socketing | — | Yes |